This invention relates generally to generating interrupts in devices controlled by processors, such as computer systems.
Computer systems use interrupts to redirect the focus of a processor or other controller from a first task to a second task. Normally interrupts arise when peripheral devices receive information and need to have that information handled through the processor or controller. Thus, for example, when a new frame is received by a network interface card (NIC) from the network, an interrupt may be generated.
Each time an interrupt is generated, the processor is interrupted, decreasing its efficiency of operation. Thus, interrupt events may be bundled together to produce a single interrupt for a plurality of such events. This may decrease the number of interrupts, increasing the performance of the peripheral device.
Generally the performance of a peripheral device may be determined by its P/E ratio which is the ratio of performance or bandwidth divided by efficiency or processor utilization. More interrupts increase processor utilization, decreasing the efficiency of the peripheral device.
Generally, peripheral devices include interrupt controllers that generate interrupts. However, in some cases, the interrupt controller may be located outside the peripheral device. In many cases, by decreasing the number of times that a processor is interrupted, the efficiency of the peripheral device may be improved.
Thus, there is a continuing need to improve the performance of peripheral devices.